| Paper title |
Author(s) |
Date |
Proceeding or journal name |
A wide tuning range 1GHz-25GHz Dll-Based Fractional Frequency Synthesizer
|
Pouya Tork Zade, Armin Tajali, Mojtaba Atarodi |
May 2005 |
ISCAS 2005 |
| A Low Jitter, 1-2 GHz Dll-Based Fractional Frequency Multiplier for on Chip Clock Generation application |
Pouya Tork Zade, Armin Tajali, Mojtaba Atarodi |
May 2005 |
ISCAS 2005 |
| A Fractional Multiplier Delay-locked loop for on Chip Clock generation application |
Pouya Tork Zade, Armin Tajali, Mojtaba Atarodi |
2005 |
ISCAS 2005 |
| Room-temperature quantum effect in Silicon nanoparticles Obtained by Low-energy implantation and embedded in a Nanometer Scale Capacitor |
M.Shalchian/y.Grisolia,G.Ben Assayag and H.Coffin |
2005 |
Applied Physics letters |
| A Duty-Cycle Controller for Low-jitter Frequency-Doubling Dll. |
A. Tajalli, S.M. Atarodi |
August 2005 |
IEEE Circuits Deviced and Systems Journal |
| Low-Voltag CMOS Transconductor-C-Filter Design Using Chang Pump Circuit Accepted for Publication on Analog Integrated Circuit Signal Processing |
A. Tajalli, S.M. Atarodi |
2005 |
Analog Integrated Circuit and System Processing |
| A Wide Tuning Range Fractional Multiplying Delay-Locked loop topology for Frequency Hopping Applications |
A. Tajalli, S.M. Atarodi |
2005 |
Analog Integrated Circuit and System Processing |
| Structured Design of Integrated Subscriber Line Interface System and Circuit |
Armin Tajalli, S.M. Atarodi |
2005 |
Analog Integrated Circuit and System Processing |
| Analysis of Jitter Peaking and Jitter Accumulation in Re-Circularity Delay Locked Loops |
Pooya Torkzade, A. Tajalli, S.M. Atarodi |
2005 |
ISCAS 2005 |
| Duty Cycle, Controller for Low-Jitter Frequency doubling Dll. |
A. Tajalli,S.M. Atarodi, H. Bazargan |
2005 |
IEEE Processing Circuit System Vol. 125,No5 |
| A Low Power Multichannel Gated Oscillator Based CDR for Short Haul Applications |
A. Tajalli, Paul Muller, S. M. Atarodi, Yusof Leblebici |
2005 |
ISLPED 2005 |
| The Effect of Oxidation Conditions on Structural and Electrical Properties of Silicon Nanoparticels Obtained by Ultra-Low energy Ion Imputations |
J. Grisolia, S. Mehrmanesh, G. Ben Assayag, Coffini S. M. Atarodi |
2005 |
Nanotechnolgy 16 |
| Electrical properties of Nanocontacts Silicon Nanoparticles Embedded in Thin Sio2 Synthesized by Ultra Low Energy Ion Implantation |
G. Ben Assayag, M. Shalchian, H. Coffini, A. Claverie, Y. Grisolian, C. Dumous, S. M. Atarodi |
2005 |
J.Vac.Sci Technologypo23(6) Nov/Dec 2005 |
| Reduced Complicity 1-bit High Order Digital Delta Sigma Modulator for Low-Voltag Fractional N Frequency Synthesis |
B. Bornoosh, A. Afcali kusha, R. Dehghani, M. Mehrmanesh, S. M. Atarodi, M. Nourani |
October 2005 |
IEEE Processing Circuit Devices System Vol 152, No.5 |
| A ¼ Rate Linear Phase detector for Pll-Based CDR Circuit |
Mohsen Saffari, S.M. Atarodi, Armin Tajalli |
2006 |
Integrated Circuit and Signal processing |
| A Technique to Suppress Tail Current Filter Noise in CMOS LC VCOS |
A. Tajalli, P. Muller, S.M. Atarodi, Yusef Leblebici |
2006 |
IEEE International Symposium on Circuits and System ISCAS 2006 |
| Analysis and Modeling of Jitter and Frequency Tolerance in gated Oscillator Bayed CDRS |
A. Tajalli, P. Muller, S. M. Atarodi, Yusef Leblebici |
2006 |
IEEE International Symposium on Circuits and System ISCAS 2006 |
| A Compact Low Power Mixed Signal Equalizer for Gigabit Ethernet Application |
S. Mehrmanesh, B. Eghbolkah, S. Saeedi , A. Afcali-Jusha, S. M. Atarodi |
2006 |
IEEE International Symposium on Circuits and System ISCAS 2006 |
| A ¼ Linear Phase Detector For Dll – Based CDR Circuits |
M. Saffari, S.M. Atarodi, A. Tajalli |
2006 |
IEEE International Symposium on Circuits and System ISCAS 2006 |